Remote Control
R&S
®
ZNB/ZNBT
770User Manual 1173.9163.02 ─ 55
to the order of traces in the response string of the
CALCulate<Ch>:PARameter:CATalog? query.
●
The number of traces monitored cannot exceed 16. If a setup contains more
traces, the newest traces are not monitored.
STATus:QUEStionable:INTegrity...
The STATus:QUEStionable:INTegrity register monitors hardware failures of the
analyzer. It can be queried using the commands
STATus:QUEStionable:INTegrity:CONDition? or
STATus:QUEStionable:INTegrity[:EVENt]?
STATus:QUEStionable:INTegrity is also the summary register of the lower-level
STATus:QUEStionable:INTegrity:HARDware register.
Refer to the Chapter 10, "Error Messages and Troubleshooting", on page 1417 for a
detailed description of hardware errors including possible remedies.
The bits in the STATus:QUEStionable:INTegrity register are defined as follows.
Bit No. Meaning
2 HARDware register summary
This bit is set if a bit is set in the STATus:QUEStionable:INTegrity:HARDware register and
the associated ENABle bit is set to 1.
STATus:QUEStionable:INTegrity:HARDware
The STATus:QUEStionable:INTegrity:HARDware register can be queried using
the commands STATus:QUEStionable:INTegrity:HARDware:CONDition? or
STATus:QUEStionable:INTegrity:HARDware[:EVENt]?
The bits in the STATus:QUEStionable:INTegrity:HARDware register are defined
as follows.
Bit No. Meaning
0 Not used
1 Reference frequency lock failure
If an external reference signal or an internal high precision clock (option B4) is used, the
local oscillator is phase locked to a reference signal. This bit is set if this phase locked
loop (PLL) fails.
For external reference: check frequency and level of the supplied reference signal.
2 Output power unleveled
This bit is set if the level control at one of the ports is unsettled or unstable, possibly due to
an external disturbing signal.
Change generator level at the port; check external components.
Status Reporting System
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