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AMD Elan SC520 - GP-DMA Controller

AMD Elan SC520
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Clock Generation and Control
5-8 Élan™SC520 Microcontroller User’s Manual
5.5.1.6 GP-DMA Controller
The GP-DMA controller can be programmed to operate at 4 MHz, 8 MHz, or 16 MHz. This
option is specified in the GP-DMA Control (GPDMACTL) register (MMCR offset D80h).
Note that these frequencies are derived from the 33-MHz clock. The exact frequency is an
even fraction of the crystal (33.000-MHz or 33.333-MHz) being used in the system.
5.5.1.7 Programmable Interval Timer
The programmable interval timer (PIT) clock source can be either the derived 1.1882-MHz
PIT clock or the CLKTIMER pin.
Note: Since the PIT clock does not run at the industry-standard 1.19318 MHz, modifications
in software must be made to allow for this difference. See “Using the PIT Clock Source in
PC/AT-Compatible Systems” on page 16-6 for more information.
5.5.1.8 General-Purpose Timers
The clock source for the three general-purpose timers is the 33-MHz clock. For Timer 0
and Timer 1, the clock source can also be an external pin or a derived prescale clock. This
option is specified in the GP Timer 0 Mode/Control (GPTMR0CTL) register (MMCR offset
C72h) and the GP Timer 1 Mode/Control (GPTMR1CTL) register (MMCR offset C7Ah).
Clocking considerations for the general-purpose timers are described in “Clocking
Considerations” on page 17-5.
5.5.1.9 Software Timer
The software timer uses the 33-MHz clock. Proper configuration of the software timer
requires the programmer to specify in the Software Timer Configuration (SWTMRCFG)
register (MMCR offset C64h) whether a 33.000-MHz or 33.333-MHz crystal is being used
in the system.
5.5.1.10 Watchdog Timer
The watchdog timer uses the 33-MHz clock. It supports up to a 30-second time-out period.
The EXP_SEL field in the Watchdog Timer Control (WDTMRCTL) register (MMCR offset
CB0h) indicates the exponent value used to calculate the time-out duration.
5.5.1.11 Real-Time Clock
The 32KXTAL2–32KXTAL1 pins are used to connect the external 32.768-kHz crystal or
oscillator to the ÉlanSC520 microcontroller. This clock source is then used to clock the
internal real-time clock (RTC) included on the ÉlanSC520 microcontroller.
5.5.1.12 UART Serial Ports
The UARTs each support an internal baud-rate clock of either 18.432 MHz or 1.8432 MHz.
This frequency is programmed in the CLK_SRC bit in the UART 1 General Control
(UART1CTL) register (MMCR offset CC0h) or the UART 2 General Control (UART2CTL)
register (MMCR offset CC4h).
5.5.1.13 Synchronous Serial Interface
The synchronous serial interface (SSI) clock is derived from the 33-MHz clock. The
CLK_SEL bit in the SSI Control (SSICTL) register (MMCR offset CD0h) is used to configure
the frequency of the SSI clock (the SSI_CLK pin). The actual bit rate will vary, depending
on whether the system is using a 33.000-MHz or a 33.333-MHz crystal.

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