AMD Elan SC520 - Automatic Initialization Control

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GP Bus DMA Controller

14-14 Élan™SC520 Microcontroller User’s Manual

Figure 14-4 GP-DMA Write Transfer

Figure 14-5 GP-DMA Verify Transfer

14.5.4.5 Automatic Initialization Control

When automatic initialization control mode is enabled via the AINIT bit in the Slave or Master

Channel x Mode register, the original values of the current address and current count

registers are automatically restored to the values in the base address and base count

registers of the given channel following the terminal count.

This feature is useful when data quantities of the same size are transferred to or from a

fixed buffer in SDRAM. This feature must be disabled when using buffer chaining mode;

otherwise, unexpected results may occur.

GPDACKx

daddr[27:0]

GPAEN

GPIORD

, GPMEMRD

GPD15

–

GPD0

dmemw

GPDRQx

Address Valid

Data Valid

GPTC