Write Buffer and Read Buffer
Élan™SC520 Microcontroller User’s Manual 11-15
11.6 INITIALIZATION
The write buffer and read buffer are reset during a system reset. As a result of this system
reset event, the write buffer and read-ahead feature of the read buffer are both disabled,
and all associated state machines are returned to their idle states.
During a programmable reset, the write buffer’s contents are reset and not maintained. The
contents of the read buffer are maintained during a programmable reset. The write buffer
and read-prefetch configuration are
not
preserved during a programmable reset. See
Chapter 6, “Reset Generation”, for more detailed information on this type of reset.
It is recommended that, prior to SDRAM sizing and test, the write buffer be disabled to
prevent false SDRAM sizing or test indications. It is also recommended that, during SDRAM
sizing or test, the read-ahead feature is disabled. Having the read-ahead feature enabled
will
not
result in false indications during sizing or test, but may result in a slight performance
degradation during the SDRAM sizing or test algorithm, because read accesses are not
consecutive in nature during sizing or test. After this period, the user is free to enable the
write buffer and read-ahead feature when desired.
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