AMD Elan SC520 - Figure 9-3 Élansc520 Microcontroller Connection to an External PCI Bus Master

PCI Bus Host Bridge
9-4 Élan™SC520 Microcontroller User’s Manual
Figure 9-3 Élan™SC520 Microcontroller Connection to an External PCI Bus Master
PCI Master
Device
AD31–AD0
CBE3–CBE0
PAR
FRAME
IRDY
TRDY
STOP
DEVSEL
PERR
SERR
RST
INT
1
REQx
GNTx
AD31–AD0
CBE3–CBE0
PAR
FRAME
IRDY
TRDY
STOP
DEVSEL
PERR
SERR
RST
INTA–INTD
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PCI Bus Host Bridge
(PCI bus target)
CLKPCIOUT
CLKPCIIN
CLK
Clock Buffering
(optional)
REQ
GNT
Notes:
1. INT implies any of the following pins: INTA
–INTD or GPIRQ10–GPIRQ0