General-Purpose Bus Controller
Élan™SC520 Microcontroller User’s Manual 13-17
13.5.9.2 16-Bit Data Access of a 16-Bit I/O Device
A 16-bit data read/write access to 16-bit I/O devices are similar to the 8-bit I/O device
accesses. In 16-bit accesses, all 16 bits of GPD are used. For memory-mapped I/O
accesses, GPMEMRD
and GPMEMWR are used instead of GPIORD and GPIOWR.
Figure 13-10 shows the timing diagram of 16-bit accesses of a 16-bit I/O device.
Figure 13-10 16-Bit Data Access of a 16-Bit I/O Device
13.5.9.3 16-Bit Data Access of an 8-Bit I/O Device
A 16-bit data access of an 8-bit I/O device requires two consecutive 8-bit data accesses of
the I/O device, but the consecutive 8-bit data accesses are resolved by the Am5
x
86 CPU
transparent to software. For memory-mapped I/O accesses, GPMEMRD
and GPMEMWR
are used instead of GPIORD
and GPIOWR. When the Am5
x
86 CPU requests a 16-bit data
access, the GP bus controller responds to the Am5
x
86 CPU with the bs8 signal, indicating
that the data width of the device is only 8 bits. The Am5
x
86 CPU then generates two
consecutive 8-bit bus cycles, and the 16-bit data access becomes two separate 8-bit data
GP bus cycles. Figure 13-11 shows the timing diagram of a 16-bit access of an 8-bit I/O
device.
Figure 13-11 16-Bit Data Access of an 8-Bit I/O Device
Read Data
GPA25–GPA0,
GPCSx
GPD15–GPD0
Write Data
GPD15–GPD0
GPBHE
GPMEMRD, GPMEMWR,
GPIORD, or GPIOWR
x..x0h
1st
2nd
x..x1h
GPA25
–
GPA0,
GPCSx
GPD7–GPD0
1st 2ndGPD7–GPD0
(for read)
(for write)
GPMEMRD
, GPMEMWR,
GPIORD, or GPIOWR
GPBHE