UART Serial Ports
21-6 Élan™SC520 Microcontroller User’s Manual
For each UART, six handshaking signals are provided:
■ DTRx (Data Terminal Ready) output—When the signal is Low, it informs the modem set
that the UART is ready to establish a communications link. The DTRx
output signal can
be asserted and deasserted by the UART x Modem Control (UARTxMCR) register.
Loopback mode operation holds DTRx
in its inactive state.
■ DSRx (Data Set Ready) input—When the signal is Low, it indicates that the modem is
ready to establish the communications link with the UART. The state of the DSRx
pin
can be tested in the UART x Modem Status (UARTxMSR) register. The DDSR status
bit provided in the UART x Modem Status (UARTxMSR) register indicates if the DSRx
signal has changed state since the register was last read. An interrupt can also be
generated upon DSRx
change.
■ RTSx (Request-to-Send) output—When the signal is Low, it informs the modem that the
UART is ready to exchange data. The RTSx
output signal can be asserted and
deasserted by the UART x Modem Control (UARTxMCR) register. Loopback mode
operation holds RTSx
in its inactive state.
■ CTSx (Clear-to-Send) input—When the signal is Low, it indicates that the modem is
ready to exchange data. The state of the CTSx
pin can be tested in the UART x Modem
Status (UARTxMSR) register. The DCTS status bit in the UART x Modem Status
(UARTxMSR) register indicates if the CTSx
signal has changed state since the register
was last read. An interrupt can also be generated upon CTSx
change.
■ DCDx (Data Carrier Detect) input—When the signal is Low, it indicates that the data
carrier has been detected by the modem and that contact between it and the other
modem is established. The state of the DCDx
pin can be tested in the UART x Modem
Status (UARTxMSR) register. The DDCD status bit in the UART x Modem Status
(UARTxMSR) register indicates if the DCDx
signal has changed state since the register
was last read. An interrupt can also be generated upon DCDx
change.
■ RINx (Ring Indicator) input—When the signal is Low, it indicates that a telephone ringing
signal has been received by the modem. The state of the RINx
pin can be tested in the
UART x Modem Status (UARTxMSR) register. The TERI status bit is also provided in
the UART x Modem Status (UARTxMSR) register indicates if the RINx
signal has
changed state from asserted to deasserted since the register was last read. An interrupt
can also be generated upon RINx
deassertion.
21.5.1 Data Transmission
21.5.1.1 16450-Compatible UART Mode
In 16450-compatible (non-FIFO or character) mode:
1. Data written to the UART x Transmit Holding (UARTxTHR) register is subsequently
latched into the internal transmitter shift register when the transmitter shift register is
empty.
2. Once data has been latched into the internal transmitter shift register, the Transmit
Holding Register Empty (THRE) bit in the UART x Line Status (UARTxLSR) register
goes to 1 (optionally generating a UART interrupt).
3. The application is once again permitted to write data to the UART x Transmit Holding
(UARTxTHR) register.
Note that writing to the UART x Transmit Holding (UARTxTHR) register in this mode when
the THRE bit is not set can result in incorrect data being transmitted.
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