AMD Elan SC520 - RAS Precharge; RAS-To-CAS Delay (TRCD ); RAS-To-RAS or Auto-Refresh-To-RAS (TRC )

SDRAM Controller
Élan™SC520 Microcontroller User’s Manual 10-21
10.5.6.2 RAS Precharge (T
RP
)
The RAS Precharge (T
RP
) parameter of an SDRAM device refers to the minimum period
of time that must be met following a Precharge command until a subsequent command to
the same bank can be issued. After T
RP
is met, the SDRAM device is considered to be in
the idle state. T
RP
varies between device vendors and device speed grades. Even though
the ÉlanSC520 microcontroller provides a 66-MHz SDRAM device clock, faster devices
are supported (83-MHz, 100-MHz, 125-MHz, etc.).
Since the ÉlanSC520 microcontroller is intended to support a variety of vendors and speed
grades, T
RP
is a configurable parameter and offers either 2T, 3T, 4T or 6T timing (where T
refers to a 15-ns clock period for a 33.333-MHz crystal). It is specified in the
RAS_PCHG_DLY bit field of the SDRAM Timing Control (DRCTMCTL) register (MMCR
offset 12h).
10.5.6.3 RAS-to-CAS Delay (T
RCD
)
The RAS-to-CAS delay parameter of an SDRAM device refers to the minimum period of
time between the time an Active command is issued to the time a read or write command
may be issued. This is referred to the T
RCD
parameter.
Since the ÉlanSC520 microcontroller is intended to support a variety of vendors and speed
grades, the T
RCD
parameter can be programmed for either 2T, 3T, or 4T timing (where T
refers to a 15-ns clock period for a 33.333-MHz crystal). Most current SDRAM devices
expect a minimum T
RCD
of 30 ns (or greater), which may be violated with a 2T setting under
heavy loading. This parameter is specified in the RAS_CAS_DLY bit field of the SDRAM
Timing Control (DRCTMCTL) register (MMCR offset 12h).
10.5.6.4 RAS-to-RAS or Auto-Refresh-to-RAS (T
RC
)
The RAS-to-RAS or auto-refresh-to-RAS parameter (T
RC
) of an SDRAM device refers to
the minimum period of time between an Active command and another Active command to
the
same internal bank. It also pertains to the minimum amount of time between an Auto
Refresh command and an Active command.
The ÉlanSC520 microcontroller does not provide a configuration for the T
RC
parameter for
the timing between an Active command and a following Active command to the
same
internal bank, since this is a function of the T
RCD
and T
RP
parameters. Two accesses to
different rows of the same internal bank result in an Active command being issued for each
access, but the Active command associated with the second access is always preceded
by a Precharge Bank command. Because of the preceding Precharge Bank command for
the second access, a combination of the T
RCD
and T
RP
parameters must provide adequate
timing such that the T
RC
parameter is not violated.
The minimum T
RC
for an Active command to an Active command is calculated as:
T
RC
= T
RCD
(configuration setting in number of clocks) + T
RP
(configuration setting in number
of clocks) + 2T (where T refers to a 15-ns clock period for a 33.333-MHz crystal).
When a T
RCD
of 2T is specified, 1T is added to the T
RC
equation to enforce a minimum
T
RAS
of 5T.
T
RC
also applies between an Auto Refresh command and an Active command. For this,
the ÉlanSC520 microcontroller enforces a
fixed 9T timing (where T refers to a 15-ns clock
period for a 33.333-MHz crystal) following the
last Auto Refresh command of a staggered
refresh sequence.