AMD Elan SC520 - Write Buffer Watermark

Write Buffer and Read Buffer
Élan™SC520 Microcontroller User’s Manual 11-9
Figure 11-5 Write Buffer Read-Merging Example
11.5.1.3 Write Buffer Watermark
The write buffer provides a watermark setting of either 8, 16, 24 or 28 doublewords. As
data is written into the write buffer, a new rank of storage is allocated, provided that write-
merging or collapsing is not taking place. When a write cycle resulting in a rank being
allocated takes place that exceeds the watermark setting, the write buffer requests service
from the SDRAM controller to initiate write transfers to SDRAM.
■ A higher watermark setting (i.e., 28 doublewords) allows the write buffer to acquire more
master write data prior to requesting SDRAM controller attention than a lower watermark
setting. If a large amount of incomplete doubleword writes (i.e., byte, word, or three byte
write transfers) is expected from either the Am5
x
86 CPU, PCI, or GP-DMA, a higher
watermark setting allows the write buffer to fill higher prior to requesting SDRAM service,
resulting in a greater chance of write data merging or collapsing.
■ A lower watermark setting can be used for applications that require more complete
doublewords, and where merging/collapsing of data is less likely. This causes the write
buffer to request SDRAM service at a lower threshold, thus reducing the chance of filling
the write buffer.
The write buffer watermark setting can be configured with the WB_WM bit in the SDRAM
Buffer Control (DBCTL) register (MMCR offset 40h). A waterrmark of 16 doublewords is
recommended.
78
56
D[7:0]
D[15:8]
D[23:16]
D[31:24]
12
34
CD
EF
FBC0000
0000000 5678000
CDEFA00
A[27:2]
BE[3
:0]
Master
SDRAM
Write Buffer (Address Segment)
Write Buffer (Data Segment)
Read Data
Write Data
Address
EE001122
Read
Merge
Logic
EE00CDEF
xxxxCDEF
Notes:
This example illustrates a 32-bit master read of address A000000h, which causes a read hit in
the write buffer. This causes the lower data word from the write buffer to be merged with the upper
data word from SDRAM, to return the entire doubleword to the requesting master.
00
AA
CC
00
00
FF
FE
55
11
A000000