AMD Elan SC520 - Figure 11-4 Write Buffer Collapsing Example

Write Buffer and Read Buffer
11-8 Élan™SC520 Microcontroller User’s Manual
Figure 11-4 Write Buffer Collapsing Example
11.5.1.2.2 Read-Merging
The write buffer supports read-merging.
■ Read-merging , as illustrated in Figure 11-5 on page 11-9, occurs when a read cycle hits
a “dirty” doubleword that currently exists in the write buffer, and the read data returned
from SDRAM is replaced, or
merged , with existing bytes from the write buffer.
Read-merging does not negate the need for a SDRAM read cycle. Even during a read cycle
that hits a complete dirty doubleword in the write buffer, a read cycle to SDRAM will still
occur, but the entire doubleword from SDRAM will be replaced with the more recent
doubleword in the write buffer. Read-merging maintains data coherency and enhances
SDRAM performance by
not requiring a flush of the write buffer contents to SDRAM before
every read cycle.
01233031
1. CPU Write, Low Word, Adrs 0A00X, Data 55AAh
AA
55
AA
55
01233031
D[7:0]
D[15:8]
D[23:16]
D[31:24]
D[7:0]
D[15:8]
D[23:16]
D[31:24]
12
34
56
78
1.
CPU Write, Low Word, Adrs 0A00X, Data 55AAh
2. CPU Write, Doubleword, Adrs 0X, Data 12345678h
EF
CD
01233031
D[7:0]
D[15:8]
D[23:16]
D[31:24]
12
34
56
78
1. CPU Write, Low Word, Adrs 0A00X, Data 55AAh
2. CPU Write, Doubleword, Adrs 0X, Data 12345678h
3. CPU Write, Low Word, Adrs 0A00X, Data CDEFh
Notes:
This example illustrates how existing data can be overwritten. Separate write cycles can be
“collapsed” and reduced to only one doubleword SDRAM write transaction.