Revision HistoryBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 3
5718-PG-106-R 06/25/12 Updated:
• “Base Address Register 1 (offset: 0x10)” on page 275
• “Base Address Register 2 (offset: 0x14)” on page 275
• “Base Address Register 3 (offset: 0x18)” on page 275
• “Base Address Register 4 (offset: 0x1c)” on page 276
• “Mode Control Register (offset: 0x6800)” on page 475
Added:
• Section 8: “IEEE1588,” on page 152
• “RX TIME STAMP LSB REG [Offset 0X06B0]” on page 163
• “RX TIME STAMP MSB REG [Offset 0x06B4]” on page 163
• “RX PTP SEQUENCE ID REG [Offset 0X06B8]” on page 163
• “RX LOCK TIMER LSB REG [Offset 0x06C0]” on page 164
• “RX LOCK TIMER MSB REG [Offset 0x06C4]” on page 164
• “RX PTP CONTROL REG [Offset 0X06C8]” on page 164
• Section 12: “IO Virtualization (IOV),” on page 264
• “Perfect Match Destination Address Registers” on page 465
• “VRQ Filter Set Registers” on page 461
• “VRQ Mapper Registers” on page 462
• “Base Address Register 5 (offset: 0x20)” on page 276
• “Base Address Register 6 (offset: 0x24)” on page 277
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