RDMA RegistersBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 439
Enable hardware fix 3 RW 1 Set to 1 to enable fix for clock switching problem
of Tx Read DMA lock-up issue.
Note that increasing the ASPM L1 entry time to a
value on the order of 1ms is recommended and
may prevent this issue from occurring. See
register 0x7d28.
Enable hardware fix 2 RW 1 Set to 1 to enable fix for Tx Read DMA lock-up
issue.
Note that increasing the ASPM L1 entry time to a
value on the order of 1ms is recommended and
may prevent this issue from occurring. See
register 0x7d28.
Reserved 1 RW 0 –
Reserved 0 RW 0 –
Name Bits Access
Default
Value
Description
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