Freescale Semiconductor PowerPC e500 Core - Page 19

PowerPC e500 Core Family Reference Manual, Rev. 1
Freescale Semiconductor xix
Contents
Paragraph
Number Title
Page
Number
Appendix A
Programming Examples
A.1 Synchronization ..............................................................................................................A-1
A.1.1 Synchronization Primitives......................................................................................... A-2
A.1.1.1 Fetch and No-op ..................................................................................................... A-2
A.1.1.2 Fetch and Store ....................................................................................................... A-3
A.1.1.3 Fetch and Add......................................................................................................... A-3
A.1.1.4 Fetch and AND....................................................................................................... A-3
A.1.1.5 Test and Set.............................................................................................................A-4
A.1.1.6 Compare and Swap................................................................................................. A-4
A.1.1.7 Notes....................................................................................................................... A-4
A.1.2 Lock Acquisition and Release .................................................................................... A-5
A.1.3 List Insertion............................................................................................................... A-6
A.1.3.1 Notes....................................................................................................................... A-7
Appendix B
Guidelines for 32-Bit Book E
B.1 64-Bit–Specific Book E Instructions...............................................................................B-1
B.2 Registers on 32-Bit Book E Implementations .................................................................B-2
B.3 Addressing on 32-Bit Book E Implementations..............................................................B-2
B.4 TLB Fields on 32-bit Book E Implementations...............................................................B-2
B.5 32-Bit Book E Software Guidelines ................................................................................B-3
B.5.1 32-Bit Instruction Selection.........................................................................................B-3
B.5.2 32-Bit Addressing........................................................................................................B-3
Appendix C
Simplified Mnemonics for PowerPC Instructions
C.1 Overview..........................................................................................................................C-1
C.2 Subtract Simplified Mnemonics ......................................................................................C-2
C.2.1 Subtract Immediate......................................................................................................C-2
C.2.2 Subtract........................................................................................................................C-2
C.3 Rotate and Shift Simplified Mnemonics..........................................................................C-2
C.3.1 Operations on Words ...................................................................................................C-3
C.4 Branch Instruction Simplified Mnemonics......................................................................C-4
C.4.1 Key Facts about Simplified Branch Mnemonics.........................................................C-5
C.4.2 Eliminating the BO Operand .......................................................................................C-5