Freescale Semiconductor PowerPC e500 Core - Page 349

Auxiliary Processing Units (APUs)
PowerPC e500 Core Family Reference Manual, Rev. 1
Freescale Semiconductor 10-13
efdctsiz efdctsiz
Convert Floating-Point Double-Precision to Signed Integer with Round toward Zero
efdctsiz rD,rB
rD
32:63
← CnvtFP64ToI32Sat(rB
0:63
, SIGN, TRUNC, I
The double-precision floating-point value in rB is converted to a signed integer using the rounding
mode Round toward Zero and the result is saturated if it cannot be represented in a 32-bit integer.
NaNs are converted as though they were zero.
Exceptions:
If the contents of rB are Infinity, Denorm, or NaN, or if an overflow occurs, SPEFSCR[FINV] is
set, and the FG, and FX bits are cleared. If SPEFSCR[FINVE] is set, an interrupt is taken, rD is
not updated, and no other status bits are set.
If conversion is inexact, inexact status is signalled and SPEFSCR[FINXS] is set. If the
floating-point inexact exception is enabled, a floating-point round interrupt is taken, rD is updated
with the truncated result, and FG and FX are updated so the handler can perform rounding.
efdctuf efdctuf
Convert Floating-Point Double-Precision to Unsigned Fraction
efdctuf rD,rB
rD
32:63
← CnvtFP64ToI32Sat(rB
0:63
, UNSIGN, ROUND, F)
The double-precision floating-point value in rB is converted to an unsigned fraction using the
current rounding mode and the result is saturated if it cannot be represented in a 32-bit unsigned
fraction. NaNs are converted as though they were zero.
Exceptions:
If the contents of rB are Infinity, Denorm, or NaN, or if an overflow occurs, SPEFSCR[FINV] is
set, and the FG, and FX bits are cleared. If SPEFSCR[FINVE] is set, an interrupt is taken, and rD
is not updated.
If conversion is inexact, inexact status is signalled and SPEFSCR[FINXS] is set. If the
floating-point inexact exception is enabled, a floating-point round interrupt is taken, rD is updated
with the truncated result, and FG and FX are updated so the handler can perform rounding.
0 56 101115162021 31
000100 rD 00000 rB 0 1011111010
0 56 101115162021 31
000100 rD 00000 rB 0 1011110110