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Ethernet (ETH): media access control (MAC) with DMA controller RM0008

1018/1096 Doc ID 13902 Rev 12

Ethernet MAC address 3 low register (ETH_MACA3LR)

Address offset: 0x005C

Reset value: 0xFFFF FFFF

The MAC address 3 low register holds the lower 32 bits of the 6-byte second MAC address

of the station.

Bits 29:24 MBC: Mask byte control

These bits are mask control bits for comparison of each of the MAC address3 bytes. When

these bits are set high, the MAC core does not compare the corresponding byte of received

DA/SA with the contents of the MAC address 3 registers. Each bit controls the masking of the

bytes as follows:

– Bit 29: ETH_MACA3HR [15:8]

– Bit 28: ETH_MACA3HR [7:0]

– Bit 27: ETH_MACA3LR [31:24]

…

– Bit 24: ETH_MACA3LR [7:0]

Bits 23:16 Reserved

Bits 15:0 MACA3H: MAC address3 high [47:32]

This field contains the upper 16 bits (47:32) of the 6-byte MAC address3.

313029282726252423222120191817161514131211109876543210

MACA3L

rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw

Bits 31:0 MACA3L: MAC address3 low [31:0]

This field contains the lower 32 bits of the 6-byte second MAC address3. The content of this

field is undefined until loaded by the application after the initialization process.

ST STM32F101xx User Manual

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