RM0008 General-purpose timers (TIM2 to TIM5)
Doc ID 13902 Rev 12 405/1096
15.4.19 TIMx register map
TIMx registers are mapped as 16-bit addressable registers as described in the table below:
Table 88. TIMx register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
TIMx_CR1
Reserved
CKD
[1:0]
ARPE
CMS
[1:0]
DIR
OPM
URS
UDIS
CEN
Reset value 0000000000
0x04
TIMx_CR2
Reserved
TI1S
MMS[2:0
]
CCDS
Reserve
d
Reset value 00000
0x08
TIMx_SMCR
Reserved
ETP
ECE
ETP
S
[1:0]
ETF[3:0]
MSM
TS[2:0]
Reserved
SMS[2:0]
Reset value 000000000000 000
0x0C
TIMx_DIER
Reserved
TDE
COMDE
CC4DE
CC3DE
CC2DE
CC1DE
UDE
Reserved
TIE
Reserved
CC4IE
CC3IE
CC2IE
CC1IE
UIE
Reset value 0
000000 0
00000
0x10
TIMx_SR
Reserved
CC4OF
CC3OF
CC2OF
CC1OF
Reserved
TIF
Reserved
CC4IF
CC3IF
CC2IF
CC1IF
UIF
Reset value 0000 0 00000
0x14
TIMx_EGR
Reserved
TG
Reserved
CC4G
CC3G
CC2G
CC1G
UG
Reset value 0 00000
0x18
TIMx_CCMR1
Output
Compare mode
Reserved
OC2CE
OC2M
[2:0]
OC2PE
OC2FE
CC2
S
[1:0]
OC1CE
OC1M
[2:0]
OC1PE
OC1FE
CC1
S
[1:0]
Reset value 0000000000000000
TIMx_CCMR1
Input Capture
mode
Reserved
IC2F[3:0]
IC2
PSC
[1:0]
CC2
S
[1:0]
IC1F[3:0]
IC1
PSC
[1:0]
CC1
S
[1:0]
Reset value 0000000000000000
0x1C
TIMx_CCMR2
Output
Compare mode
Reserved
O24CE
OC4M
[2:0]
OC4PE
OC4FE
CC4
S
[1:0]
OC3CE
OC3M
[2:0]
OC3PE
OC3FE
CC3
S
[1:0]
Reset value 0000000000000000
TIMx_CCMR2
Input Capture
mode
Reserved
IC4F[3:0]
IC4
PSC
[1:0]
CC4
S
[1:0]
IC3F[3:0]
IC3
PSC
[1:0]
CC3
S
[1:0]
Reset value 0000000000000000
0x20
TIMx_CCER
Reserved
CC4P
CC4E
Reserved
CC3P
CC3E
Reserved
CC2P
CC2E
Reserved
CC1P
CC1E
Reset value 00 00 00 00
0x24
TIMx_CNT
Reserved
CNT[15:0]
Reset value 0000000000000000