ST STM32F101xx User Manual

Ethernet (ETH): media access control (MAC) with DMA controller RM0008
984/1096 Doc ID 13902 Rev 12
Figure 352. TxDMA operation in Default mode
TxDMA operation: OSF mode
While in the Run state, the transmit process can simultaneously acquire two frames without
closing the Status descriptor of the first (if the OSF bit is set in ETH_DMAOMR register[2]).
As the transmit process finishes transferring the first frame, it immediately polls the transmit
descriptor list for the second frame. If the second frame is valid, the transmit process
transfers this frame before writing the first frame’s status information. In OSF mode, the
Run-state transmit DMA operates according to the following sequence:
Start TxDMA
(Re-)fetch next
descriptor
Write status word
to TDES0
Wait for Tx status
Transfer data from
buffer(s)
(AHB)
error?
Own
bit set?
(AHB)
error?
Frame xfer
complete?
Time stamp
present?
(AHB)
error?
Write time stamp to
TDES2 and TDES3
(AHB)
error?
Stop TxDMA
TxDMA suspended
No
Ye s
No
Ye s
No
No
Start
Ye s
Ye s
Ye s
Close intermediate
descriptor
No
Ye s
No
Ye s
No
Poll demand
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ST STM32F101xx Specifications

General

Brand	ST
Model	STM32F101xx
Category	Microcontrollers
Language	English