Analog-to-digital converter (ADC) RM0008
236/1096 Doc ID 13902 Rev 12
11.12.7 ADC watchdog high threshold register (ADC_HTR)
Address offset: 0x24
Reset value: 0x0000 0FFF
11.12.8 ADC watchdog low threshold register (ADC_LTR)
Address offset: 0x28
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
HT[11:0]
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:12 Reserved, must be kept cleared.
Bits 11:0 HT[11:0]: Analog watchdog high threshold
These bits are written by software to define the high threshold for the analog watchdog.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
LT[ 11:0]
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:12 Reserved, must be kept cleared.
Bits 11:0 LT[11:0]: Analog watchdog low threshold
These bits are written by software to define the low threshold for the analog watchdog.