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RM0008 Real-time clock (RTC)

Doc ID 13902 Rev 12 473/1096

18.4.5 RTC counter register (RTC_CNTH / RTC_CNTL)

The RTC core has one 32-bit programmable counter, accessed through two 16-bit registers;

the count rate is based on the TR_CLK time reference, generated by the prescaler.

RTC_CNT registers keep the counting value of this counter. They are write-protected by bit

RTOFF in the RTC_CR register, and a write operation is allowed if the RTOFF value is ‘1’. A

write operation on the upper (RTC_CNTH) or lower (RTC_CNTL) registers directly loads the

corresponding programmable counter and reloads the RTC Prescaler. When reading, the

current value in the counter (system date) is returned.

RTC counter register high (RTC_CNTH)

Address offset: 0x18

Reset value: 0x0000

RTC counter register low (RTC_CNTL)

Address offset: 0x1C

Reset value: 0x0000

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RTC_CNT[31:16]

rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw

Bits 15:0 RTC_CNT[31:16]: RTC counter high

Reading the RTC_CNTH register, the current value of the high part of the RTC Counter

Section 18.3.4: Configuring RTC registers on page 467).

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RTC_CNT[15:0]

rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw

Bits 15:0 RTC_CNT[15:0]: RTC counter low

Reading the RTC_CNTL register, the current value of the lower part of the RTC Counter

Section 18.3.4: Configuring RTC registers on page 467).

ST STM32F101xx User Manual

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