Ethernet (ETH): media access control (MAC) with DMA controller RM0008
938/1096 Doc ID 13902 Rev 12
29 Ethernet (ETH): media access control (MAC) with
DMA controller
Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
High-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 256 and 512 Kbytes.
XL-density devices are STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 768 Kbytes and 1 Mbyte.
Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
This section applies only to STM32F107xx connectivity line devices.
29.1 Ethernet introduction
Portions Copyright (c) 2004, 2005 Synopsys, Inc. All rights reserved. Used with permission.
The Ethernet peripheral enables the STM32F107xx to transmit and receive data over
Ethernet in compliance with the IEEE 802.3-2002 standard.
The Ethernet provides a configurable, flexible peripheral to meet the needs of various
applications and customers. It supports two industry standard interfaces to the external
physical layer (PHY): the default media independent interface (MII) defined in the IEEE
802.3 specifications and the reduced media independent interface (RMII). It can be used in
number of applications such as switches, network interface cards, etc.
The Ethernet is compliant with the following standards:
● IEEE 802.3-2002 for Ethernet MAC
● IEEE 1588-2002 standard for precision networked clock synchronization
● AMBA 2.0 for AHB Master/Slave ports
● RMII specification from RMII consortium
29.2 Ethernet main features
The Ethernet (ETH) peripheral includes the following features, listed by category:
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