ST STM32F101xx User Manual

Advanced-control timers (TIM1&TIM8) RM0008
310/1096 Doc ID 13902 Rev 12
14.3.14 6-step PWM generation
When complementary outputs are used on a channel, preload bits are available on the
OCxM, CCxE and CCxNE bits. The preload bits are transferred to the shadow bits at the
COM commutation event. Thus you can program in advance the configuration for the next
step and change the configuration of all the channels at the same time. COM can be
generated by software by setting the COM bit in the TIMx_EGR register or by hardware (on
TRGI rising edge).
A flag is set when the COM event occurs (COMIF bit in the TIMx_SR register), which can
generate an interrupt (if the COMIE bit is set in the TIMx_DIER register) or a DMA request
(if the COMDE bit is set in the TIMx_DIER register).
The Figure 91 describes the behavior of the OCx and OCxN outputs when a COM event
occurs, in 3 different examples of programmed configurations.
Figure 91. 6-step generation, COM example (OSSR=1)
(CCRx)
OCx
OCxN
Write COM to 1
counter (CNT)
OCxREF
COM event
CCxE=1
CCxNE=0
OCxM=100
OCx
OCxN
CCxE=0
CCxNE=1
OCxM=101
OCx
OCxN
CCxE=1
CCxNE=0
OCxM=100
Example 1
Example 2
Example 3
write OCxM to 100
CCxE=1
CCxNE=0
OCxM=100 (forced inactive)
CCxE=1
CCxNE=0
OCxM=100 (forced inactive)
Write CCxNE to 1
and OCxM to 101
write CCxNE to 0
and OCxM to 100
CCxE=1
CCxNE=0
OCxM=100 (forced inactive)
ai14910

ST STM32F101xx Specifications

General

Brand	ST
Model	STM32F101xx
Category	Microcontrollers
Language	English