RM0008 Universal synchronous asynchronous receiver transmitter (USART)
Doc ID 13902 Rev 12 761/1096
● Parity control:
– Transmits parity bit
– Checks parity of received data byte
● Four error detection flags:
– Overrun error
– Noise error
–Frame error
– Parity error
● Ten interrupt sources with flags:
– CTS changes
– LIN break detection
– Transmit data register empty
– Transmission complete
– Receive data register full
– Idle line received
– Overrun error
– Framing error
– Noise error
– Parity error
● Multiprocessor communication - enter into mute mode if address match does not occur
● Wake up from mute mode (by idle line detection or address mark detection)
● Two receiver wakeup modes: Address bit (MSB, 9
th
bit), Idle line
27.3 USART functional description
The interface is externally connected to another device by three pins (see Figure 27.3.1).
Any USART bidirectional communication requires a minimum of two pins: Receive Data In
(RX) and Transmit Data Out (TX):
RX: Receive Data Input is the serial data input. Oversampling techniques are used for data
recovery by discriminating between valid incoming data and noise.
TX: Transmit Data Output. When the transmitter is disabled, the output pin returns to its IO
port configuration. When the transmitter is enabled and nothing is to be transmitted, the TX
pin is at high level. In single-wire and smartcard modes, this IO is used to transmit and
receive the data (at USART level, data are then received on SW_RX).
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