Ethernet (ETH): media access control (MAC) with DMA controller RM0008
1042/1096 Doc ID 13902 Rev 12
29.8.5 Ethernet register maps
Table 214 gives the ETH register map and reset values.
Table 214. Ethernet register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
ETH_MACCR
Reserved
WD
JD
Reserved
IFG
CSD
Reserved
FES
ROD
LM
DM
IPCO
RD
Reserved
APCS
BL
DC
TE
RE
Reserved
Reset value 00 0000 000000 000000
0x04
ETH_MACFF
R
RA
Reserved
HPF
SAF
PCF
BFD
PAM
DAIF
HM
HU
PM
Reset value 0 00000000000
0x08
ETH_MACHT
HR
HTH[31:0]
Reset value 00000000000000000000000000000000
0x0C
ETH_MACHT
LR
HTL[31:0]
Reset value 00000000000000000000000000000000
0x10
ETH_MACMII
AR
Reserved
PA MR
Reserved
CR
M
W
M
B
Reset value 0000000000 00000
0x14
ETH_MACMII
DR
Reserved
MD
Reset value 0000000000000000
0x18
ETH_MACFC
R
PT
Reserved
ZQPD
Reserved
PLT
UPFD
RFCE
TFCE
FCB/BPA
Reset value 0000000000000000 0 000000
0x1C
ETH_MACVL
ANTR
Reserved
VLANTC
VLANTI
Reset value 00000000000000000
0x28
ETH_MACRW
UFFR
Frame filter reg0\Frame filter reg1\Frame filter reg2\Frame filter reg3\Frame filter reg4\...\Frame filter reg7
Reset value 0
0x2C
ETH_MACPM
TCSR
WFFRPR
Reserved
GU
Reserved
WFR
MPR
Reserved
WFE
MPE
PD
Reset value 0 0 00 000
0x38
ETH_MACSR
Not applicable
Reserved
TSTS
Reserved
MMCTS
MMCRS
MMCS
PMTS
Reserved
Reset value 00000
0x3C
ETH_MACIM
R
Not applicable
Reserved
TSTIM
Reserved
PMTIM
Reserved
Reset value 00
0x40
ETH_MACA0
HR
MO
Reserved MACA0H
Reset value 10000000000000001111111111111111
0x44
ETH_MACA0
LR
MACA0L
Reset value 11111111111111111111111111111111
0x48
ETH_MACA1
HR
AE SA MBC[6:0]
Reserved
MACA1H
Reset value 00000000 1111111111111111
0x4C
ETH_MACA1
LR
MACA1L
Reset value 11111111111111111111111111111111
0x50
ETH_MACA2
HR
AE SA MBC
Reserved
MACA2H
Reset value 00000000 1111111111111111
0x54
ETH_MACA2
LR
MACA2L
Reset value 11111111111111111111111111111111
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