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ST STM32F101xx User Manual

ST STM32F101xx
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Universal synchronous asynchronous receiver transmitter (USART) RM0008
774/1096 Doc ID 13902 Rev 12
27.3.5 USART receiver’s tolerance to clock deviation
The USART’s asynchronous receiver works correctly only if the total clock system deviation
is smaller than the USART receiver’s tolerance. The causes which contribute to the total
deviation are:
DTRA: Deviation due to the transmitter error (which also includes the deviation of the
transmitter’s local oscillator)
DQUANT: Error due to the baud rate quantization of the receiver
DREC: Deviation of the receiver’s local oscillator
DTCL: Deviation due to the transmission line (generally due to the transceivers which
can introduce an asymmetry between the low-to-high transition timing and the high-to-
low transition timing)
DTRA + DQUANT + DREC + DTCL < USART receiver’s tolerance
The USART receiver’s tolerance to properly receive data is equal to the maximum tolerated
deviation and depends on the following choices:
10- or 11-bit character length defined by the M bit in the USART_CR1 register
use of fractional baud rate or not
Table 192. USART receiver’s tolerance when DIV_Fraction is 0
Table 193. USART receivers tolerance when DIV_Fraction is different from 0
Note: The figures specified in Tabl e 1 92 and Tabl e 1 93 may slighly differ in the special case when
the received frames contain some Idle frames of exactly 10-bit times when M=0 (11-bit times
when M=1).
27.3.6 Multiprocessor communication
There is a possibility of performing multiprocessor communication with the USART (several
USARTs connected in a network). For instance, one of the USARTs can be the master, its
TX output is connected to the RX input of the other USART. The others are slaves, their
respective TX outputs are logically ANDed together and connected to the RX input of the
master.
In multiprocessor configurations it is often desirable that only the intended message
recipient should actively receive the full message contents, thus reducing redundant USART
service overhead for all non addressed receivers.
M bit NF is an error NF is don’t care
0 3.75% 4.375%
1 3.41% 3.97%
M bit NF is an error NF is don’t care
0 3.33% 3.88%
1 3.03% 3.53%

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ST STM32F101xx Specifications

General IconGeneral
BrandST
ModelSTM32F101xx
CategoryMicrocontrollers
LanguageEnglish

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