USB on-the-go full-speed (OTG_FS) RM0008
812/1096 Doc ID 13902 Rev 12
The peripheral core provides the following status checks and interrupt generation:
● Transfer completed interrupt, indicating that data transfer was completed on both the
application (AHB) and USB sides
● Setup stage has been done (control-out only)
● Associated transmit FIFO is half or completely empty (in endpoints)
● NAK acknowledge has been transmitted to the host (isochonous-in only)
● IN token received when Tx-FIFO was empty (bulk-in/interrupt-in only)
● Out token received when endpoint was not yet enabled
● Babble error condition has been detected
● Endpoint disable by application is effective
● Endpoint NAK by application is effective (isochronous-in only)
● More than 3 back-to-back setup packets were received (control-out only)
● Timeout condition detected (control-in only)
● Isochronous out packet has been dropped, without generating an interrupt
28.6 USB host
This section gives the functional description of the OTG_FS in the USB host mode. The
OTG_FS works as a USB host in the following circumstances:
● OTG A-host
– OTG A-device default state when the A-side of the USB cable is plugged in
● OTG B-host
– OTG B-device after HNP switching to the host role
● A-device
– If the ID line is present, functional and connected to the A-side of the USB cable,
and the HNP-capable bit is cleared in the Global USB Configuration register
(HNPCAP bit in OTG_FS_GUSBCFG). Integrated pull-down resistors are
automatically set on the DP/DM lines.
● Host only (see figure Figure 304: USB host-only connection).
– The force host mode bit in the global USB configuration register (FHMOD bit in
OTG_FS_GUSBCFG) forces the OTG_FS core to work as a USB host-only. In this
case, the ID line is ignored even if present on the USB connector. Integrated pull-
down resistors are automatically set on the DP/DM lines.
Note: 1 On-chip 5 V V
BUS
generation is not supported. For this reason, a charge pump or, if 5 V are
available on the application board, a basic power switch must be added externally to drive
the 5 V V
BUS
line. The external charge pump can be driven by any GPIO output. This is
required for the OTG A-host, A-device and host-only configurations.
2The V
BUS
input ensures that valid V
BUS
levels are supplied by the charge pump during USB
operations while the charge pump overcurrent output can be input to any GPIO pin
configured to generate port interrupts. The overcurrent ISR must promptly disable the V
BUS
generation.
3The V
BUS
pin can be freed by disabling the V
BUS
sensing option. This is done by setting the
NOVBUSSENS bit in the OTG_FS_GCCFG register. In this case the V
BUS
is considered
internally to be always at V
BUS
valid level (5 V).
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