ST STM32F101xx

RM0008 Flexible static memory controller (FSMC)
Doc ID 13902 Rev 12 507/1096
Mode C - NOR Flash - OE toggling
Figure 194. ModeC read accesses
Figure 195. ModeC write accesses
The differences compared with mode1 are the toggling of NOE and NADV and the
independent read and write timings.
A[25:0]
NOE
(ADDSET +1) (DATAST + 1)
Memory transaction
Data strobe
NEx
D[15:0]
HCLK cycles HCLK cycles
NWE
NADV
data driven
by memory
ai14725c
High
2 HCLK
cycles
Data sampled
A[25:0]
NOE
(ADDSET +1) (DATAST + 1)
Memory transaction
NEx
D[15:0]
HCLK cycles HCLK cycles
NWE
NADV
data driven by FSMC
ai14723b
1HCLK