RM0008 Flexible static memory controller (FSMC)
Doc ID 13902 Rev 12 509/1096
Mode D - asynchronous access with extended address
Figure 196. ModeD read accesses
ModeD write accessesThe differences with mode1 are the toggling of NADV, NOE that
goes on toggling after NADV changes and the independent read and write timings.
A[25:0]
NOE
(ADDSET +1) (DATAST + 1)
Memory transaction
Data strobe
NEx
D[15:0]
HCLK cycles HCLK cycles
NWE
NADV
data driven
by memory
ai14726c
High
(ADDHLD + 1)
HCLK cycles
2 HCLK
cycles
Data sampled
A[25:0]
NOE
(ADDSET +1) (DATAST + 1)
Memory transaction
NEx
D[15:0]
HCLK cycles HCLK cycles
NWE
NADV
data driven by FSMC
ai14727c
1HCLK
(ADDHLD + 1)
HCLK cycles
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