ST STM32F101xx User Manual

RM0008 General-purpose timers (TIM2 to TIM5)
Doc ID 13902 Rev 12 403/1096
15.4.17 TIMx DMA control register (TIMx_DCR)
Address offset: 0x48
Reset value: 0x0000
15.4.18 TIMx DMA address for full transfer (TIMx_DMAR)
Address offset: 0x4C
Reset value: 0x0000
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Reserved
DBL[4:0]
Reserved
DBA[4:0]
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Bits 15:13 Reserved, always read as 0
Bits 12:8 DBL[4:0]: DMA burst length
This 5-bits vector defines the length of DMA transfers (the timer recognizes a burst transfer
when a read or a write access is done to the TIMx_DMAR address), i.e. the number of bytes to
be transferred.
00000: 1 byte,
00001: 2 bytes,
00010: 3 bytes,
...
10001: 18 bytes.
Bits 7:5 Reserved, always read as 0
Bits 4:0 DBA[4:0]: DMA base address
This 5-bit vector defines the base-address for DMA transfers (when read/write access are
done through the TIMx_DMAR address). DBA is defined as an offset starting from the
address of the TIMx_CR1 register.
Example:
00000: TIMx_CR1,
00001: TIMx_CR2,
00010: TIMx_SMCR,
...
Example: Let us consider the following transfer: DBL = 7 bytes & DBA = TIMx_CR1. In this
case the transfer is done to/from 7 registers starting from the TIMx_CR1 address..
– If DBL = 7 bytes and DBA = TIM2_CR1 represents the address of the byte to be transferred,
the address of the transfer should be given by the following equation:
(TIMx_CR1 address) + DBA + (DMA index), where DMA index = DBL
In this example, 7 bytes are added to (TIMx_CR1 address) + DBA, which gives us the address
from/to which the data will be copied. In this case, the transfer is done to 7 registers starting
from the following address: (TIMx_CR1 address) + DBA
According to the configuration of the DMA Data Size, several cases may occur:
– If you configure the DMA Data Size in half-words, 16-bit data will be transferred to each of
the 7 registers.
If you configure the DMA Data Size in bytes, the data will aslo be transferred to 7 registers:
the first register will contain the first MSB byte, the second register, the first LSB byte and so
on. So with the transfer Timer, you also have to specify the size of data transferred by DMA.
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DMAB[15:0]
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ST STM32F101xx Specifications

General

Brand	ST
Model	STM32F101xx
Category	Microcontrollers
Language	English