General-purpose timers (TIM9 to TIM14) RM0008
438/1096 Doc ID 13902 Rev 12
16.5.8 TIM9/12 capture/compare enable register (TIMx_CCER)
Address offset: 0x20
Reset value: 0x0000
1514131211109876543210
Reserved
CC2NP
Res.
CC2P CC2E CC1NP
Res.
CC1P CC1E
rw rw rw rw rw rw
Bits 15:8 Reserved, always read as 0.
Bit 7 CC2NP: Capture/Compare 2 output Polarity
refer to CC1NP description
Bits 6 Reserved, always read as 0.
Bit 5 CC2P: Capture/Compare 2 output Polarity
refer to CC1P description
Bit 4 CC2E: Capture/Compare 2 output enable
refer to CC1E description
Bit 3 CC1NP: Capture/Compare 1 complementary output Polarity
CC1 channel configured as output: CC1NP must be kept cleared
CC1 channel configured as input: CC1NP is used in conjunction with CC1P to define
TI1FP1/TI2FP1 polarity (refer to CC1P description).
Bits 2 Reserved, always read as 0.
Bit 1 CC1P: Capture/Compare 1 output Polarity.
CC1 channel configured as output:
0: OC1 active high.
1: OC1 active low.
CC1 channel configured as input:
CC1NP/CC1P bits select TI1FP1 and TI2FP1 polarity for trigger or capture operations.
00 : noninverted/rising edge : circuit is sensitive to TIxFP1 rising edge (capture, trigger in
reset, external clock or trigger mode), TIxFP1 is not inverted (trigger in gated mode, encoder
mode).
01 : inverted/falling edge : circuit is sensitive to TIxFP1 falling edge (capture, trigger in reset,
external clock or trigger mode), TIxFP1 is inverted (trigger in gated mode, encoder mode).
10 : reserved, do not use this configuration.
Note: 11: noninverted/both edges : circuit is sensitive to both TIxFP1 rising and falling edges
(capture, trigger in reset, external clock or trigger mode), TIxFP1 is not inverted (trigger
in gated mode). This configuration must not be used for encoder mode.
Bit 0 CC1E: Capture/Compare 1 output enable.
CC1 channel configured as output:
0: Off - OC1 is not active.
1: On - OC1 signal is output on the corresponding output pin.
CC1 channel configured as input:
This bit determines if a capture of the counter value can actually be done into the input
capture/compare register 1 (TIMx_CCR1) or not.
0: Capture disabled.
1: Capture enabled.