ST STM32F101xx User Manual

RM0008 Ethernet (ETH): media access control (MAC) with DMA controller
Doc ID 13902 Rev 12 1043/1096
0x58
ETH_MACA3
HR
AE SA MBC
Reserved
MACA3H
Reset value 00000000 1111111111111111
0x5C
ETH_MACA3
LR
MACA3L
Reset value 11111111111111111111111111111111
0x100
ETH_MMCCR
Reserved
MCF
ROR
CSR
CR
Reset value 0000
0x104
ETH_MMCRI
R
Reserved
RGUFS
Reserved
RFAES
RFCES
Reserved
Reset value 0 0 0
0x108
ETH_MMCTI
R
Reserved
TGFS
Reserved
TGFMSCS
TGFSCS
Reserved
Reset value 0 0 0
0x10C
ETH_MMCRI
MR
Reserved
RGUFM
Reserved
RFAEM
RFCEM
Reserved
Reset value 0 0 0
0x110
ETH_MMCTI
MR
Reserved
TGFM
Reserved
TGFMSCM
TGFSCM
Reserved
Reset value 0 0 0
0x14C
ETH_MMCTG
FSCCR
TGFSCC
Reset value 00000000000000000000000000000000
0x150
ETH_MMCTG
FMSCCR
TGFMSCC
Reset value 00000000000000000000000000000000
0x168
ETH_MMCTG
FCR
TGFC
Reset value 00000000000000000000000000000000
0x194
ETH_MMCRF
CECR
RFCEC
Reset value 00000000000000000000000000000000
0x198
ETH_MMCRF
AECR
RFAEC
Reset value 00000000000000000000000000000000
0x1C4
ETH_MMCR
GUFCR
RGUFC
Reset value 00000000000000000000000000000000
0x700
ETH_PTPTS
CR
Reserved
TTSARU
TSITE
TSSTU
TSSTI
TSFCU
TSE
Reset value 000000
0x704
ETH_PTPSSI
R
Reserved
STSSI
Reset value 00000000
0x708
ETH_PTPTS
HR
STS[31:0]
Reset value 00000000000000000000000000000000
0x70C
ETH_PTPTSL
R
STPNS
STSS
Reset value 00000000000000000000000000000000
0x710
ETH_PTPTS
HUR
TSUS
Reset value 00000000000000000000000000000000
0x714
ETH_PTPTSL
UR
TSUPNS
TSUSS
Reset value 00000000000000000000000000000000
Table 214. Ethernet register map and reset values (continued)
Offset Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0

ST STM32F101xx Specifications

General

Brand	ST
Model	STM32F101xx
Category	Microcontrollers
Language	English