ST STM32F101xx

Connectivity line devices: reset and clock control (RCC) RM0008
140/1096 Doc ID 13902 Rev 12
Bits 13:12 Reserved, always read as 0.
Bit 11 WWDGRST: Window watchdog reset
Set and cleared by software.
0: No effect
1: Reset window watchdog
Bits 10:6 Reserved, always read as 0.
Bit 5 TIM7RST: Timer 7 reset
Set and cleared by software.
0: No effect
1: Reset timer 7
Bit 4 TIM6RST: Timer 6 reset
Set and cleared by software.
0: No effect
1: Reset timer 6
Bit 3 TIM5RST: Timer 5 reset
Set and cleared by software.
0: No effect
1: Reset timer 5
Bit 2 TIM4RST: Timer 4 reset
Set and cleared by software.
0: No effect
1: Reset timer 4
Bit 1 TIM3RST: Timer 3 reset
Set and cleared by software.
0: No effect
1: Reset timer 3
Bit 0 TIM2RST: Timer 2 reset
Set and cleared by software.
0: No effect
1: Reset timer 2