ST STM32F101xx User Manual

RM0008 Flexible static memory controller (FSMC)
Doc ID 13902 Rev 12 497/1096
Table 107. NOR Flash/PSRAM supported memories and transactions
Device Mode R/W
AHB
data
size
Memory
data size
Allowed/
not
allowed
Comments
NOR Flash
(muxed I/Os
and nonmuxed
I/Os)
Asynchronous R 8 16 Y
Asynchronous W 8 16 N
Asynchronous R 16 16 Y
Asynchronous W 16 16 Y
Asynchronous R 32 16 Y
Split into 2 FSMC
accesses
Asynchronous W 32 16 Y
Split into 2 FSMC
accesses
Asynchronous
page
R - 16 N Mode is not supported
Synchronous R 8 16 N
Synchronous R 16 16 Y
Synchronous R 32 16 Y
PSRAM
(muxed I/Os
and nonmuxed
I/Os)
Asynchronous R 8 16 Y
Asynchronous W 8 16 Y Use of byte lanes NBL[1:0]
Asynchronous R 16 16 Y
Asynchronous W 16 16 Y
Asynchronous R 32 16 Y
Split into 2 FSMC
accesses
Asynchronous W 32 16 Y
Split into 2 FSMC
accesses
Asynchronous
page
R - 16 N Mode is not supported
Synchronous R 8 16 N
Synchronous R 16 16 Y
Synchronous R 32 16 Y
Synchronous W 8 16 Y Use of byte lanes NBL[1:0]
Synchronous W 16/32 16 Y
SRAM and
ROM
Asynchronous R 8 / 16 16 Y Use of byte lanes NBL[1:0]
Asynchronous W 8 / 16 16 Y Use of byte lanes NBL[1:0]
Asynchronous R 32 16 Y
Split into 2 FSMC
accesses
Asynchronous W 32 16 Y
Split into 2 FSMC
accesses

ST STM32F101xx Specifications

General

Brand	ST
Model	STM32F101xx
Category	Microcontrollers
Language	English