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ST STM32F101xx User Manual

ST STM32F101xx
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RM0008 USB on-the-go full-speed (OTG_FS)
Doc ID 13902 Rev 12 849/1096
OTG_FS Host non-periodic transmit FIFO size register
(OTG_FS_HNPTXFSIZ)/Endpoint 0 Transmit FIFO size (OTG_FS_DIEPTXF0)
Address offset: 0x028
Reset value: 0x0000 0200
Host mode
Device mode
OTG_FS non-periodic transmit FIFO/queue status register
(OTG_FS_HNPTXSTS)
Address offset: 0x02C
Reset value: 0x0008 0200
Note: In Device mode, this register is not valid.
This read-only register contains the free space information for the non-periodic TxFIFO and
the non-periodic transmit request queue.
313029282726252423222120191817161514131211109876543210
NPTXFD/TX0FD NPTXFSA/TX0FSA
r/rw r/rw
Bits 31:16 NPTXFD: Non-periodic TxFIFO depth
This value is in terms of 32-bit words.
Minimum value is 16
Maximum value is 256
Bits 15:0 NPTXFSA: Non-periodic transmit RAM start address
This field contains the memory start address for non-periodic transmit FIFO RAM.
Bits 31:16 TX0FD: Endpoint 0 TxFIFO depth
This value is in terms of 32-bit words.
Minimum value is 16
Maximum value is 256
Bits 15:0 TX0FSA: Endpoint 0 transmit RAM start address
This field contains the memory start address for the endpoint 0 transmit FIFO RAM.
313029282726252423222120191817161514131211109876543210
Reserved
NPTXQTOP NPTQXSAV NPTXFSAV
rr r
Bit 31 Reserved

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ST STM32F101xx Specifications

General IconGeneral
BrandST
ModelSTM32F101xx
CategoryMicrocontrollers
LanguageEnglish

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