ST STM32F101xx User Manual

RM0008 USB on-the-go full-speed (OTG_FS)
Doc ID 13902 Rev 12 869/1096
OTG_FS all endpoints interrupt mask register (OTG_FS_DAINTMSK)
Address offset: 0x81C
Reset value: 0x0000 0000
The OTG_FS_DAINTMSK register works with the Device endpoint interrupt register to
interrupt the application when an event occurs on a device endpoint. However, the
OTG_FS_DAINT register bit corresponding to that interrupt is still set.
OTG_FS device V
BUS
discharge time register (OTG_FS_DVBUSDIS)
Address offset: 0x0828
Reset value:
0x0000 17D7
This register specifies the V
BUS
discharge time after V
BUS
pulsing during SRP.
313029282726252423222120191817161514131211109876543210
OEPM IEPM
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 OEPM: OUT EP interrupt mask bits
One per OUT endpoint:
Bit 16 for OUT EP 0, bit 18 for OUT EP 3
0: Masked interrupt
1: Unmasked interrupt
Bits 15:0 IEPM: IN EP interrupt mask bits
One bit per IN endpoint:
Bit 0 for IN EP 0, bit 3 for IN EP 3
0: Masked interrupt
1: Unmasked interrupt
313029282726252423222120191817161514131211109876543210
Reserved
VBUSDT
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:16 Reserved
Bits 15:0 VBUSDT: Device V
BUS
discharge time
Specifies the V
BUS
discharge time after V
BUS
pulsing during SRP. This value equals:
V
BUS
discharge time in PHY clocks / 1 024
Depending on your V
BUS
load, this value may need adjusting.

ST STM32F101xx Specifications

General

Brand	ST
Model	STM32F101xx
Category	Microcontrollers
Language	English