Broadcom NetXtreme/NetLink BCM5718 Series - Page 40

List of TablesBCM5718 Programmer’s Guide
Broadcom®
January 29, 2016 • 5718-PG108-R Page 40
Table 36: Mac Address Registers .................................................................................................................. 135
Table 37: Multicast Hash Table Registers ..................................................................................................... 137
Table 38: Recommended BCM57XX Ethernet Controller Memory Pool Watermark Settings ....................... 140
Table 39: Recommended BCM57XX Ethernet controller Low Watermark Maximum Receive Frames Settings.
140
Table 40: Recommended BCM57XX Ethernet Controller Host Coalescing Tick Counter Settings ............... 143
Table 41: Recommended BCM57XX Ethernet Controller Host Coalescing Frame Counter Settings ........... 143
Table 42: Recommended BCM57XX Ethernet Controller Max Coalesced Frames During Interrupt Counter
Settings......................................................................................................................................... 143
Table 43: PTP Link Delay Measure Roles ..................................................................................................... 153
Table 44: PTP Time Synchronization Messaging Roles................................................................................ 154
Table 45: Send Ring SBD Flags .................................................................................................................... 157
Table 46: Receive Return Ring RBD Flags ................................................................................................... 158
Table 47: Device Specific Registers .............................................................................................................. 172
Table 48: PCI Address Map Standard View .................................................................................................. 180
Table 49: GPIO Usage for Power Management for Broadcom Drivers ......................................................... 191
Table 50: Ethernet Controller Power Pins...................................................................................................... 191
Table 51: Endian Example............................................................................................................................. 193
Table 52: Storage of Big-Endian Data ........................................................................................................... 193
Table 53: Storage of Little-Endian Data ......................................................................................................... 193
Table 54: Default Translation (No Swapping) on 64-Bit PCI.......................................................................... 194
Table 55: Default Translation (No Swapping) on 32-bit PCI .......................................................................... 195
Table 56: RCB (Big Endian 32-Bit Format).................................................................................................... 195
Table 57: Internal Byte Ordering .......................................................................................PCI Byte Ordering195
Table 58: Byte Swap Enable Translation on 32-Bit PCI (No Word Swap)..................................................... 196
Table 59: Big-Endian Internal Packet Data Format ....................................................................................... 197
Table 60: 64-Bit PCI Bus (WSD = 0, BSD = 0) .............................................................................................. 197
Table 61: 32-Bit PCI Bus (WSD = 0, BSD = 0) .............................................................................................. 198
Table 62: 64-Bit PCI Bus (WSD = 0, BSD = 1) .............................................................................................. 198
Table 63: 32-Bit PCI Bus (WSD = 0, BSD = 1) .............................................................................................. 198
Table 64: 64-Bit PCI Bus (WSD = 1, BSD = 0) .............................................................................................. 198
Table 65: 32-Bit PCI Bus (WSD = 1, BSD = 0) .............................................................................................. 198
Table 66: 64-Bit PCI Bus (WSD = 1, BSD = 1) .............................................................................................. 199
Table 67: 32-Bit PCI Bus (WSD = 1, BSD = 1) .............................................................................................. 199
Table 68: Send Buffer Descriptor (Big-Endian 64-Bit format) ........................................................................ 200
Table 69: Send Buffer Descriptor (Big-Endian 32-Bit format) ........................................................................ 200
Table 70: Send Buffer Descriptor (Little-Endian 32-Bit format) with No Swapping ........................................ 201