GigaDevice Semiconductor GD32F3x0 - Page 13

GD32F3x0 User Manual
13
21.3. Function overview .................................................................................................... 554
21.3.1. CEC bus pin ........................................................................................................................ 554
21.3.2. Message description ........................................................................................................... 555
21.3.3. Bit timing description ........................................................................................................... 556
21.3.4. Arbitration ............................................................................................................................ 557
21.3.5. SFT option bit description ................................................................................................... 558
21.3.6. Error definition..................................................................................................................... 558
21.3.7. HDMI-CEC interrupt ............................................................................................................ 561
21.4. Register definition .................................................................................................... 563
21.4.1. Control register (CEC_CTL) ............................................................................................... 563
21.4.2. Configuration register (CEC_CFG) ..................................................................................... 564
21.4.3. Transmit data register (CEC_TDATA) ................................................................................. 565
21.4.4. Receive data register (CEC_RDATA) ................................................................................. 566
21.4.5. Interrupt Flag Register (CEC_INTF) ................................................................................... 566
21.4.6. Interrupt enable register (CEC_INTEN) .............................................................................. 568
22. Touch sensing interface (TSI) .......................................................................... 571
22.1. Overview .................................................................................................................... 571
22.2. Characteristics .......................................................................................................... 571
22.3. Function Overview ................................................................................................... 571
22.3.1. TSI block diagram ............................................................................................................... 571
22.3.2. Touch sensing technique overview ..................................................................................... 571
22.3.3. Charge transfer sequence .................................................................................................. 572
22.3.4. Charge transfer sequence FSM.......................................................................................... 574
22.3.5. Clock and duration time of states ....................................................................................... 576
22.3.6. PIN mode control of TSI ..................................................................................................... 577
22.3.7. Analog switch (ASW) and I/O hysteresis mode .................................................................. 577
22.3.8. TSI operation flow ............................................................................................................... 578
22.3.9. TSI flags and interrupts ....................................................................................................... 578
22.3.10. TSI GPIOs ........................................................................................................................... 578
22.4. Registers definition .................................................................................................. 580
22.4.1. Control register0 (TSI_CTL0) ............................................................................................. 580
22.4.2. Interrupt enable register(TSI_INTEN) ................................................................................. 582
22.4.3. Interrupt flag clear register (TSI_INTC) .............................................................................. 583
22.4.4. Interrupt flag register (TSI_INTF)........................................................................................ 583
22.4.5. Pin hysteresis mode register(TSI_PHM) ............................................................................ 584
22.4.6. Analog switch register(TSI_ASW) ...................................................................................... 584
22.4.7. Sample configuration register(TSI_SAMPCFG) ................................................................. 585
22.4.8. Channel configuration register(TSI_CHCFG) ..................................................................... 585
22.4.9. Group control register(TSI_GCTL) ..................................................................................... 586
22.4.10. Group x cycle number registers(TSI_GxCYCN)(x= 0..5) ................................................... 587
22.4.11. Control register1 (TSI_CTL1) ............................................................................................. 587