ST STM32F101xx User Manual

RM0008 Memory and bus architecture
Doc ID 13902 Rev 12 51/1096
0x4001 5800 - 0x4001 7FFF Reserved
APB2
0x4001 5400 - 0x4001 57FF TIM11 timer Section 16.5.14 on page 441
0x4001 5000 - 0x4001 53FF TIM10 timer Section 16.5.14 on page 441
0x4001 4C00 - 0x4001 4FFF TIM9 timer Section 16.5.14 on page 441
0x4001 4000 - 0x4001 4BFF Reserved
0x4001 3C00 - 0x4001 3FFF ADC3 Section 11.12.15 on page 241
0x4001 3800 - 0x4001 3BFF USART1 Section 27.6.8 on page 801
0x4001 3400 - 0x4001 37FF TIM8 timer Section 14.4.21 on page 344
0x4001 3000 - 0x4001 33FF SPI1 Section 25.5 on page 716
0x4001 2C00 - 0x4001 2FFF TIM1 timer Section 14.4.21 on page 344
0x4001 2800 - 0x4001 2BFF ADC2 Section 11.12.15 on page 241
0x4001 2400 - 0x4001 27FF ADC1 Section 11.12.15 on page 241
0x4001 2000 - 0x4001 23FF GPIO Port G Section 9.5 on page 187
0x4001 1C00 - 0x4001 1FFF GPIO Port F Section 9.5 on page 187
0x4001 1800 - 0x4001 1BFF GPIO Port E Section 9.5 on page 187
0x4001 1400 - 0x4001 17FF GPIO Port D Section 9.5 on page 187
0x4001 1000 - 0x4001 13FF GPIO Port C Section 9.5 on page 187
0x4001 0C00 - 0x4001 0FFF GPIO Port B Section 9.5 on page 187
0x4001 0800 - 0x4001 0BFF GPIO Port A Section 9.5 on page 187
0x4001 0400 - 0x4001 07FF EXTI Section 10.3.7 on page 204
0x4001 0000 - 0x4001 03FF AFIO Section 9.5 on page 187
Table 3. Register boundary addresses (continued)
Boundary address Peripheral Bus Register map

ST STM32F101xx Specifications

General

Brand	ST
Model	STM32F101xx
Category	Microcontrollers
Language	English