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ST STM32F405 User Manual

ST STM32F405
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RM0090 Rev 18 1055/1749
RM0090 Secure digital input/output interface (SDIO)
1075
CMD9. Only the bits [127...1] of the CID and CSD are transferred, the reserved bit [0] of
these registers is replaced by the end bit of the response. The card indicates that an erase
is in progress by holding MCDAT low. The actual erase time may be quite long, and the host
may issue CMD7 to deselect the card.
31.5.4 R3 (OCR register)
Code length: 48 bits. The contents of the OCR register are sent as a response to CMD1.
The level coding is as follows: restricted voltage windows = low, card busy = low.
31.5.5 R4 (Fast I/O)
Code length: 48 bits. The argument field contains the RCA of the addressed card, the
register address to be read from or written to, and its content.
Table 174. R2 response
Bit position Width (bits Value Description
135 1 0 Start bit
134 1 0 Transmission bit
[133:128] 6 111111 Command index
[127:1] 127 X Card status
011 End bit
Table 175. R3 response
Bit position Width (bits Value Description
47 1 0 Start bit
46 1 0 Transmission bit
[45:40] 6 111111 Reserved
[39:8] 32 X OCR register
[7:1] 7 1111111 Reserved
011 End bit
Table 176. R4 response
Bit position Width (bits Value Description
47 1 0 Start bit
46 1 0 Transmission bit
[45:40] 6 ‘100111 CMD39
[39:8] Argument field
[31:16] 16 X RCA
[15:8] 8 X register address
[7:0] 8 X read register contents

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ST STM32F405 Specifications

General IconGeneral
BrandST
ModelSTM32F405
CategoryComputer Hardware
LanguageEnglish

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