Digital-to-analog converter (DAC) RM0090
440/1749 RM0090 Rev 18
It is possible to reset triangle wave generation by resetting the WAVEx[1:0] bits.
Figure 70. DAC triangle wave generation
Figure 71. DAC conversion (SW trigger enabled) with triangle wave generation
Note: The DAC trigger must be enabled for noise generation by setting the TENx bit in the
DAC_CR register.
The MAMPx[3:0] bits must be configured before enabling the DAC, otherwise they cannot
be changed.
14.4 Dual DAC channel conversion
To efficiently use the bus bandwidth in applications that require the two DAC channels at the
same time, three dual registers are implemented: DHR8RD, DHR12RD and DHR12LD. A
unique register access is then required to drive both DAC channels at the same time.
Eleven possible conversion modes are possible using the two DAC channels and these dual
registers. All the conversion modes can nevertheless be obtained using separate DHRx
registers if needed.
All modes are described in the paragraphs below.
MAMPx[3:0] max amplitude
+ DAC_DHRx base value
DAC_DHRx base value
Incrementation
ai14715c
Decrementation
0
APB1_CLK
0x00
0xAAA
DHR
DOR
ai14714b
0xD55
SWTRIG
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