USB on-the-go high-speed (OTG_HS) RM0090
1404/1749 RM0090 Rev 18
Host-mode CSR map
These registers must be programmed every time the core changes to host mode.
OTG_HS_GRXSTSR 0x01C
OTG_HS Receive status debug read/OTG status read and pop registers
(OTG_HS_GRXSTSR/OTG_HS_GRXSTSP) on page 1425
OTG_HS_GRXSTSP 0x020
OTG_HS_GRXFSIZ 0x024 OTG_HS Receive FIFO size register (OTG_HS_GRXFSIZ) on page 1426
OTG_HS_GNPTXFSIZ/
OTG_HS_TX0FSIZ
0x028
OTG_HS nonperiodic transmit FIFO size/Endpoint 0 transmit FIFO size
register (OTG_HS_GNPTXFSIZ/OTG_HS_TX0FSIZ) on page 1427
OTG_HS_GNPTXSTS 0x02C
OTG_HS nonperiodic transmit FIFO/queue status register
(OTG_HS_GNPTXSTS) on page 1427
OTG_HS_GCCFG 0x038
OTG_HS general core configuration register (OTG_HS_GCCFG) on
page 1428
OTG_HS_CID 0x03C OTG_HS core ID register (OTG_HS_CID) on page 1429
OTG_HS_HPTXFSIZ 0x100
OTG_HS Host periodic transmit FIFO size register (OTG_HS_HPTXFSIZ)
on page 1429
OTG_HS_DIEPTXFx
0x104
0x108
...
0x114
OTG_HS device IN endpoint transmit FIFO size register
(OTG_HS_DIEPTXFx) (x = 1..5, where x is the FIFO_number) on page 1430
Table 208. Core global control and status registers (CSRs) (continued)
Acronym
Address
offset
Register name
Table 209. Host-mode control and status registers (CSRs)
Acronym
Offset
address
Register name
OTG_HS_HCFG 0x400 OTG_HS host configuration register (OTG_HS_HCFG) on page 1430
OTG_HS_HFIR 0x404 OTG_HS Host frame interval register (OTG_HS_HFIR) on page 1432
OTG_HS_HFNUM 0x408
OTG_HS host frame number/frame time remaining register
(OTG_HS_HFNUM) on page 1432
OTG_HS_HPTXSTS 0x410
OTG_HS_Host periodic transmit FIFO/queue status register
(OTG_HS_HPTXSTS) on page 1433
OTG_HS_HAINT 0x414
OTG_HS Host all channels interrupt register (OTG_HS_HAINT) on
page 1434
OTG_HS_HAINTMSK 0x418
OTG_HS host all channels interrupt mask register (OTG_HS_HAINTMSK)
on page 1434
OTG_HS_HPRT 0x440
OTG_HS host port control and status register (OTG_HS_HPRT) on
page 1435
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