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ST STM32F405 User Manual

ST STM32F405
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RM0090 Rev 18 1621/1749
RM0090 Flexible memory controller (FMC)
1682
Figure 461. ModeA write access waveforms
The differences compared with mode1 are the toggling of NOE and the independent read
and write timings.
Table 271. FMC_BCRx bit fields
Bit
number
Bit name Value to set
31-21 Reserved 0x000
20 CCLKEN As needed
19 CBURSTRW 0x0 (no effect in asynchronous mode)
18:16 CPSIZE 0x0 (no effect in asynchronous mode)
15 ASYNCWAIT
Set to 1 if the memory supports this feature. Otherwise keep at
0.
14 EXTMOD 0x1
13 WAITEN 0x0 (no effect in asynchronous mode)
12 WREN As needed
11 WAITCFG Don’t care
10 WRAPMOD 0x0
9 WAITPOL Meaningful only if bit 15 is 1
8 BURSTEN 0x0
7 Reserved 0x1
6 FACCEN Don’t care
A[25:0]
NOE
ADDSET (DATAST + 1)
Memory transaction
NEx
D[31:0]
HCLK cycles HCLK cycles
NWE
NBL[3:0]
data driven by FSMC
MS30455V1
1HCLK

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ST STM32F405 Specifications

General IconGeneral
BrandST
ModelSTM32F405
CategoryComputer Hardware
LanguageEnglish

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