RM0090 Rev 18 431/1749
RM0090 Analog-to-digital converter (ADC)
432
Table 72. ADC register map and reset values for each ADC
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
ADC_SR
Reserved
OVR
STRT
JSTRT
JEOC
EOC
AWD
Reset value 000000
0x04
ADC_CR1
Reserved
OVRIE
RES[1:0]
AWDEN
JAWDEN
Reserved
DISC
NUM [2:0]
JDISCEN
DISCEN
JAUTO
AWD SGL
SCAN
JEOCIE
AWDIE
EOCIE
AWDCH[4:0]
Reset value 00000 0000000000000000
0x08
ADC_CR2
Re
se
rv
ed
SWSTART
EXTEN[1:0]
EXTSEL [3:0]
Re
se
rv
ed
JSWSTART
JEXTEN[1:0]
JEXTSEL
[3:0]
Reserved
ALIGN
EOCS
DDS
DMA
Reserved
CONT
ADON
Reset value 0000000 0000000 00 0 00
0x0C
ADC_SMPR1 Sample time bits SMPx_x
Reset value 00000000000000000000000000000000
0x10
ADC_SMPR2 Sample time bits SMPx_x
Reset value 00000000000000000000000000000000
0x14
ADC_JOFR1
Reserved
JOFFSET1[11:0]
Reset value 000000000000
0x18
ADC_JOFR2
Reserved
JOFFSET2[11:0]
Reset value 000000000000
0x1C
ADC_JOFR3
Reserved
JOFFSET3[11:0]
Reset value 000000000000
0x20
ADC_JOFR4
Reserved
JOFFSET4[11:0]
Reset value 000000000000
0x24
ADC_HTR
Reserved
HT[11:0]
Reset value 111111111111
0x28
ADC_LTR
Reserved
LT[11:0]
Reset value 000000000000
0x2C
ADC_SQR1
Reserved
L[3:0] Regular channel sequence SQx_x bits
Reset value 000000000000000000000000
0x30
ADC_SQR2
Reserved
Regular channel sequence SQx_x bits
Reset value 000000000000000000000000000000
0x34
ADC_SQR3
Reserved
Regular channel sequence SQx_x bits
Reset value 000000000000000000000000000000
0x38
ADC_JSQR
Reserved
JL[1:0] Injected channel sequence JSQx_x bits
Reset value 0000000000000000000000
0x3C
ADC_JDR1
Reserved
JDATA[15:0]
Reset value 0000000000000000
0x40
ADC_JDR2
Reserved
JDATA[15:0]
Reset value 0000000000000000
0x44
ADC_JDR3
Reserved
JDATA[15:0]
Reset value 0000000000000000
0x48
ADC_JDR4
Reserved
JDATA[15:0]
Reset value 0000000000000000
0x4C
ADC_DR
Reserved
Regular DATA[15:0]
Reset value 0000000000000000
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