ST STM32F405

Memory and bus architecture RM0090
60/1749 RM0090 Rev 18
Figure 1. System architecture for STM32F405xx/07xx and STM32F415xx/17xx devices
ARM
Cortex-M4
GP
DMA1
GP
DMA2
MAC
Ethernet
USB OTG
HS
Bus matrix-S
ICODE
DCODE
ACCEL
Flash
memory
SRAM1
112 Kbyte
SRAM2
16 Kbyte
AHB1
peripherals
AHB2
FSMC
Static MemCtl
I-bus
D-bus
S-bus
DMA_PI
DMA_MEM1 DMA_MEM2
DMA_P2
ETHERNET_M
USB_HS_M
ai18490d
CCM data RAM
64-Kbyte
APB1
APB2
peripherals