RM0090 Rev 18 1629/1749
RM0090 Flexible memory controller (FMC)
1682
Figure 468. ModeD write access waveforms
The differences with mode1 are the toggling of NOE that goes on toggling after NADV
changes and the independent read and write timings.
Table 280. FMC_BCRx bit fields
Bit No. Bit name Value to set
31-21 Reserved 0x000
20 CCLKEN As needed
19 CBURSTRW 0x0 (no effect in asynchronous mode)
18:16 CPSIZE 0x0 (no effect in asynchronous mode)
15 ASYNCWAIT
Set to 1 if the memory supports this feature. Otherwise keep
at 0.
14 EXTMOD 0x1
13 WAITEN 0x0 (no effect in asynchronous mode)
12 WREN As needed
11 WAITCFG Don’t care
10 WRAPMOD 0x0
9 WAITPOL Meaningful only if bit 15 is 1
8 BURSTEN 0x0
7 Reserved 0x1
6 FACCEN Set according to memory support
5-4 MWID As needed
A[25:0]
NOE
ADDSET (DATAST+ 1)
Memory transaction
NEx
D[31:0]
HCLK cycles HCLK cycles
NWE
NADV
data driven by FSMC
MS30462V1
1HCLK
ADDHLD
HCLK cycles
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