ST STM32F405 User Manual

RM0090 Rev 18 345/1749
RM0090 Chrom-Art Accelerator™ controller (DMA2D)
370
The way the CLUT data are organized in the system memory is specified in Table 56: CLUT
data order in memory.
11.3.6 DMA2D blender
The DMA2D blender blends the source pixels by pair to compute the resulting pixel.
The blending is performed according to the following equation:
No configuration register is required by the blender. The blender usage depends on the
DMA2D operating mode defined in MODE[1:0] field of the DMA2D_CR register.
11.3.7 DMA2D output PFC
The output PFC performs the pixel format conversion from 32 bits to the output format
defined in the CM[2:0] field of the DMA2D output pixel format converter configuration
register (DMA2D_OPFCCR).
The supported output formats are given in Table 57: Supported color mode in output
Table 55. Supported CLUT color mode
CCM CLUT color mode
0 32-bit ARGB8888
124-bit RGB888
Table 56. CLUT data order in memory
CLUT Color Mode @ + 3 @ + 2 @ + 1 @ + 0
ARGB8888 A
0
[7:0] R
0
[7:0] G
0
[7:0] B
0
[7:0]
RGB888
B
1
[7:0] R
0
[7:0] G
0
[7:0] B
0
[7:0]
G
2
[7:0] B
2
[7:0] R
1
[7:0] G
1
[7:0]
R
3
[7:0] G
3
[7:0] B
3
[7:0] R
2
[7:0]
C
OUT
=
with α
Mult
=
C
FG
.α
FG
+ C
BG
.α
BG
- C
BG
.α
Mult
α
OUT
255
α
FG
. α
BG
with C = R or G or B
α
OUT
= α
FG
+ α
BG
- α
Mult
Division is rounded to the nearest lower integer

ST STM32F405 Specifications

General

Brand	ST
Model	STM32F405
Category	Computer Hardware
Language	English