ST STM32F405 User Manual

RM0090 Rev 18 1187/1749
RM0090 Ethernet (ETH): media access control (MAC) with DMA controller
1239
Figure 383. Enhanced receive descriptor field format with IEEE1588 time stamp
enabled
• RDES4: Receive descriptor Word4
The extended status, shown below, is valid only when there is status related to IPv4
checksum or time stamp available as indicated by bit 0 in RDES0.
RDES 3
O
W
N
Status [30:0]
Reserved
[30:29]
Buffer 2 byte count
[28:16]
CTRL
[15:14]
Buffer 1 byte count
[12:0]
Buffer 1 address [31:0]
Buffer 2 address [31:0] or Next descriptor address [31:0]
RDES 0
RDES 1
RDES 2
31 0
ai17104
Res.
CT
RL
RDES 7
RDES 4
RDES 5
RDES 6
Extended Status [31:0]
Reserved
Time stamp low [31:0]
Time stamp high [31:0]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
PV
PFT
PMT
IPV6PR IPV4PR
IPCB
IPPE
IPHE
IPPT
rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:14 Reserved, must be kept at reset value.
Bit 13 PV: PTP version
When set, indicates that the received PTP message uses the IEEE 1588 version 2 format.
When cleared, it uses version 1 format. This is valid only if the message type is non-zero.
Bit 12 PFT: PTP frame type
When set, this bit indicates that the PTP message is sent directly over Ethernet. When this bit
is cleared and the message type is non-zero, it indicates that the PTP message is sent over
UDP-IPv4 or UDP-IPv6. The information on IPv4 or IPv6 can be obtained from bits 6 and 7.

ST STM32F405 Specifications

General

Brand	ST
Model	STM32F405
Category	Computer Hardware
Language	English