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ST STM32F405 User Manual

ST STM32F405
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RM0090 Rev 18 551/1749
RM0090 Advanced-control timers (TIM1 and TIM8)
588
17.3.15 One-pulse mode
One-pulse mode (OPM) is a particular case of the previous modes. It allows the counter to
be started in response to a stimulus and to generate a pulse with a programmable length
after a programmable delay.
Starting the counter can be controlled through the slave mode controller. Generating the
waveform can be done in output compare mode or PWM mode. Select One-pulse mode by
setting the OPM bit in the TIMx_CR1 register. This makes the counter stop automatically at
the next update event UEV.
A pulse can be correctly generated only if the compare value is different from the counter
initial value. Before starting (when the timer is waiting for the trigger), the configuration must
be:
In upcounting: CNT < CCRx ARR (in particular, 0 < CCRx)
In downcounting: CNT > CCRx
Figure 126. Example of one pulse mode.
For example the user may want to generate a positive pulse on OC1 with a length of t
PULSE
and after a delay of t
DELAY
as soon as a positive edge is detected on the TI2 input pin.
Let’s use TI2FP2 as trigger 1:
Map TI2FP2 to TI2 by writing CC2S=’01’ in the TIMx_CCMR1 register.
TI2FP2 must detect a rising edge, write CC2P=’0’ and CC2NP=’0’ in the TIMx_CCER
register.
Configure TI2FP2 as trigger for the slave mode controller (TRGI) by writing TS=’110’ in
the TIMx_SMCR register.
TI2FP2 is used to start the counter by writing SMS to ‘110’ in the TIMx_SMCR register
(trigger mode).
MS31099V2
TI2
OC1REF
Counter
t
0
TIM1_ARR
TIM1_CCR1
OC1
t
DELAY
t
PULSE

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ST STM32F405 Specifications

General IconGeneral
BrandST
ModelSTM32F405
CategoryComputer Hardware
LanguageEnglish

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