ST STM32F405

RM0090 Rev 18 521/1749
RM0090 Advanced-control timers (TIM1 and TIM8)
588
Figure 90. Counter timing diagram, internal clock divided by 2
Figure 91. Counter timing diagram, internal clock divided by 4
Figure 92. Counter timing diagram, internal clock divided by N
MS31079V3
CK_PSC
CNT_EN
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
0034 0035 0036 0000 0001 0002 0003
MS31080V3
CK_PSC
CNT_EN
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
0000 00010035 0036
MS31081V3
CK_PSC
Timerclock = CK_CNT
Counter register
Update event (UEV)
Counter overflow
Update interrupt flag (UIF)
001F 20