ST STM32F405

Embedded Flash memory interface RM0090
112/1749 RM0090 Rev 18
0x10
FLASH_CR
LOCK
Reserved
EOPIE
Reserved
STRT
MER1
Reserved
PSIZE[1:0]
SNB[4:0]
MER
SER
PG
Reset value 1 0 00 00000000 0 0
0x14
FLASH_OPTCR
SPRMOD
DB1M
Reserved
nWRP[11:0] RDP[7:0]
nRST_STDBY
nRST_STOP
WDG_SW
BFB2
BOR_LEV[1:0]
OPTSTRT
OPTLOCK
Reset value 00 1111111111111010101011101 1 0 1
0x18
FLASH_
OPTCR1
Reserved
nWRP[11:0]
Reserved
Reset value 111111111111
Table 20. Flash register map and reset values (STM32F42xxx and STM32F43xxx) (continued)
Offset Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
11
10
9 8 7 6 5 4 3 2 1 0