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ST STM32F405 User Manual

ST STM32F405
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RM0090 Rev 18 1439/1749
RM0090 USB on-the-go high-speed (OTG_HS)
1543
OTG_HS host channel-x split control register (OTG_HS_HCSPLTx) (x = 0..11,
where x = Channel_number)
Address offset: 0x504 + 0x20 * x
Reset value: 0x0000 0000
313029282726252423222120191817161514131211109876543210
SPLITEN
Reserved
COMPLSPLT
XACTPOS
HUBADDR
PRTADDR
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bit 31 SPLITEN: Split enable
The application sets this bit to indicate that this channel is enabled to perform split
transactions.
Bits 30:17 Reserved, must be kept at reset value.
Bit 16 COMPLSPLT: Do complete split
The application sets this bit to request the OTG host to perform a complete split transaction.
Bits 15:14 XACTPOS: Transaction position
This field is used to determine whether to send all, first, middle, or last payloads with each
OUT transaction.
11: All. This is the entire data payload of this transaction (which is less than or equal to 188
bytes)
10: Begin. This is the first data payload of this transaction (which is larger than 188 bytes)
00: Mid. This is the middle payload of this transaction (which is larger than 188 bytes)
01: End. This is the last payload of this transaction (which is larger than 188 bytes)
Bits 13:7 HUBADDR: Hub address
This field holds the device address of the transaction translator’s hub.
Bits 6:0 PRTADDR: Port address
This field is the port number of the recipient transaction translator.

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ST STM32F405 Specifications

General IconGeneral
BrandST
ModelSTM32F405
CategoryComputer Hardware
LanguageEnglish

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